By Stamatis Vassiliadis, Georgi Gaydadjiev, Koen Bertels, Elena Moscu Panainte (auth.), Andy D. Pimentel, Stamatis Vassiliadis (eds.)
ISBN-10: 3540223770
ISBN-13: 9783540223771
ISBN-10: 3540277765
ISBN-13: 9783540277767
This e-book constitutes the refereed lawsuits of the 4th overseas Workshop on structures, Architectures, Modeling, and Simulation, SAMOS 2004, held in Samos, Greece on July 2004. in addition to the SAMOS 2004 court cases, the ebook additionally offers 19 revised papers from the predecessor workshop SAMOS 2003.
The fifty five revised complete papers provided have been rigorously reviewed and chosen for inclusion within the e-book. The papers are prepared in topical sections on reconfigurable computing, architectures and implementation, and platforms modeling and simulation.
Read or Download Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth International Workshops, SAMOS 2004, Samos, Greece, July 21-23, 2004 and July 19-21, 2004. Proceedings PDF
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Additional info for Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth International Workshops, SAMOS 2004, Samos, Greece, July 21-23, 2004 and July 19-21, 2004. Proceedings
Sample text
One outstanding objective in this third process is to deliver a generous approach that is not necessary bounded to a A. Pimentel and S. ): SAMOS 2004, LNCS 3133, pp. 30–38, 2004. © Springer-Verlag Berlin Heidelberg 2004 Basic OS Support for Distributed Reconfigurable Hardware 31 specific FPGA architecture. In the context of our paper, we consider only small networks in the sense that the whole state of the ReCoNet is known and stored in each ReCoNode. A lot of related work has been published in the area of routing and computer networks [4].
6 Conclusions In this paper, we addressed several specific problems related to the microcodes management in the MOLEN reconfigurable computing paradigm. More precisely, the generation, memory alignment and loading of configuration microcodes were Loading Design Considerations 19 investigated. The microcode termination issue was discussed in more details and alternative design considerations were proposed. Some specific features of a new microcode finalization tool were outlined after a detailed description of the set microcode finalization process.
The MATRIX [14] architecture focuses on this concept. In the respect, this paper will introduce new paradigm of architecture able to manage such kinds of parallelism processes called RAMPASS (Reconfigurable And Advanced Multi-Processing Architecture for future Silicon System). 2 Functional Description of RAMPASS In this section, the global functionality of RAMPASS is described. It is composed of two main reconfigurable parts (Fig. 2): one dedicated to the control of applications called Reconfigurable Array of Control (RAC); and an other dedicated to the computation named Reconfigurable Array of Operators (RAO).
Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth International Workshops, SAMOS 2004, Samos, Greece, July 21-23, 2004 and July 19-21, 2004. Proceedings by Stamatis Vassiliadis, Georgi Gaydadjiev, Koen Bertels, Elena Moscu Panainte (auth.), Andy D. Pimentel, Stamatis Vassiliadis (eds.)
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