By Vlad P Shmerko; Svetlana N Yanushkevich; Sergey Edward Lyshevski
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Additional resources for Computer Arithmetics for Nanoelectronics
Analysis of programmable molecular electronic systems. , Molecular and Nano Electronics: Analysis, Design and Simulation, pp. 96–140, Elsevier, Amsterdam, 2007.  Negrini R and Sami MG. Fault Tolerance Trough Reconﬁguration in VLSI and WSI Arrays. The MIT Press, Cambridge, MA, 1989.  Peper F, Lee J, Abo F, Isokawa T, Adachi S, Matsui N, and Mashiko S. Fault-tolerance in nanocomputers: a cellular array approach. IEEE Trans. Nanotechnology, 3(1):187–201, 2004.  Porod W, Lent CS, Toth G, Csurgay A, Huang Y-F, and Liu RW.
The methods of contemporary logic design such as data structures design, their optimization, computer array structures, and others typify, to some extent, natural processing. (b) Evolutionary computing centers on search and optimization, which are observed in living systems. Evolutionary algorithms have been used extensively in evolvable hardware . Evolutionary algorithms have been shown to perform well in exploring large and complex design spaces, including logic network design. Systolic arrays are special class of cellular arrays, that are based on the parallel-pipelined paradigm of computing.
339–361, Wiley-VCH, Weinheim, Germany, 2001.  Toth G, Lent CS, Tougaw PD, Brazhnik Y, Weng WW, Porod W, Liu RW, and Huang YF. Quantum cellular neural networks. Superlattices and Microstructures, 20,:473–478, 1996.  Tour JM and James DK. Molecular electronic computing architectures. , Handbook of Nanoscience, Engineering and Technology, pp. 28, CRC Press, Boca Raton, FL, 2003.  Tour JM. Molecular Electronics: Commercial Insights, Chemistry, Devices, Architecture and Programming. World Scientiﬁc, Hackensack, NJ, 2003.
Computer Arithmetics for Nanoelectronics by Vlad P Shmerko; Svetlana N Yanushkevich; Sergey Edward Lyshevski